The present invention relates to the production of multi-layer blanks for electric circuit board and it is particularly, although not exclusively, suitable for the production of multi-layer printed or "written" circuits for receiving packages of logic circuits, such as DIP.
The majority of multi-layer printed circuit blanks available at present are manufactured by pressing a sandwich having internal layers, intended to constitute common ground and electrical supply planes, printed in advance according to a tracing defined by the customer. The logic connections are effected on the other layers and the connections between one face and the other (or an internal layer) by metal coated through holes. This solution has drawbacks: it is necessary to define an internal layer artwork for each particular need, whence high cost since design work has to be repeated for each circuit, even if the quantities are small. The excess blanks cannot be used for other systems.
Multi-layer boards are also known whose inner layers are predefined and have a standard outline. However, such board blanks also have drawbacks. They impose restrictions as to the place of the packages, which limits their field of use and reduces the maximum density of implantation of external packages.
In summary, existing blanks do not constitute standard components usable to produce any type of circuit. It is not possible to use these blanks as a conventional double face board with plated through holes, since conditions as to the locations where connecting holes may be formed between the surfaces must be respected. It is not possible to store the inner layers as pre-pressed cards. Finally, when the blank is of the type having supply and ground layers of predetermined outline, the density of implantation and interconnection is reduced; in particular, it is not possible to locate components at all nodes of the standard grid with a pitch of 2.54 mm or 0.1 in.
It is an object of the invention to provide improved blanks for the production of multi-layer electrical circuit boards. It is a more specific object to reduce the design cost, due to the use of a standard blank, and the production costs of the blank, due to manufacture on a larger scale; it is still another object of the invention to authorize large integration densities due to the possibility to locate chips at all nodes of a standard grid or network and to remove conditions as regards the positioning of the plated holes.
For that purpose, a blank for a multi-layer electrical circuit board comprises an insulating flat substrate containing at least one inner layer, parallel to the faces of the substrate and having an electrically conducting network extending over the whole surface of the layer and formed by the repetition in two dimensions of an elementary pattern. That repetition defines a first grid of constant pitch p whose nodes are non-conducting sites and defines a second grid of pitch p, off-set by p/2 with respect to the first, having nodes at least one of which per elementary pattern is non-conducting and the other of which belong to the conducting network. A connection can consequently be made between the internal layer and a component borne by the support by means of a plated hole located at any one of said other sites.
Such a blank can be produced on an industrial scale conventionally by pressing or rolling. Due to the continuous nature of the conducting network, the connection has an impedance which is substantially the same whatever the position of the node.
The blank will typically comprise two parallel inner layers, one of which will constitute a common ground plane and the other the common supply plane; their grids will be off-set by p along one of the dimensions of the network. Thus, a connection may easily be made by a plated through hole between the two outer surfaces of the blank in any one of the nodes of the first grid; a connection with the supply or ground may be made with a plated hole at a node of the second grid.
The or each conduction network may consist, at each of said other nodes, of an annular metal area defining a central circular opening of sufficient diameter to permit drilling of a small diameter hole connecting the opposed surfaces without however forming a connection with the network. The elementary pattern can have three of said other nodes, off-set by a half step p/2 in two directions at right angles with respect to the first sites on which the chips will be connected.
Manufacturing of double face multi-layer boards from a blank of the above-defined type may be as follows: the connections between the opposed faces are made by means of plated holes which can be drilled at any one of the sites of the first grid. If said other nodes include electrically conducting zones which are annular rather than fully circular, it is possible to connect the opposed faces by means of a plated hole of diameter less than that of the inner circle of the zone. The connections between one face and the inner layer can be made by a plated hole drilled at one of the other sites. When two internal layers are provided, connection with one of the layers will be formed by drilling and plating a hole at one of those of said other sites of one of the layers which are opposite that of the sites of the second layer which is non-conducting.
The invention will be better understood from the following description of particular embodiments given by way of examples.